Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 
 
Software Version and Target Device
Product Version: ISE:14.7 (WebPack) - P.20131013 Target Family: Spartan3E
OS Platform: LIN Target Device: xc3s250e
Project ID (random number) ee0eb98de10045fc9825da25affded4b.4049337FE061E67E2E21DAE1E3B47095.7 Target Package: tq144
Registration ID 211070429_0_0_814 Target Speed: -4
Date Generated 2019-05-28T09:08:18 Tool Flow ISE
 
User Environment
OS Name Ubuntu OS Release Ubuntu 14.04 LTS
CPU Name Intel(R) Core(TM)2 Duo CPU E8400 @ 3.00GHz CPU Speed 3003.000 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=3
  • 16-bit adder=3
 Comparators=10
  • 16-bit comparator greatequal=4
  • 16-bit comparator lessequal=6
 Multipliers=6
  • 16x10-bit multiplier=1
  • 16x34-bit multiplier=3
  • 16x6-bit multiplier=1
  • 16x9-bit multiplier=1
 		MiscellaneousStatistics
  • AGG_BONDED_IO=3
  • AGG_IO=3
  • AGG_SLICE=35
  • NUM_4_INPUT_LUT=64
  • NUM_BONDED_IBUF=2
  • NUM_BONDED_IOB=1
  • NUM_CYMUX=44
  • NUM_LUT_RT=8
  • NUM_MULT18X18SIO=2
  • NUM_SLICEL=35
  • NUM_XOR=16
 		NetStatistics
  • NumNets_Active=94
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BRAMDUMMY=46
  • NumNodesOfType_Active_DOUBLE=123
  • NumNodesOfType_Active_DUMMY=150
  • NumNodesOfType_Active_DUMMYBANK=11
  • NumNodesOfType_Active_DUMMYESC=2
  • NumNodesOfType_Active_HFULLHEX=1
  • NumNodesOfType_Active_HUNIHEX=14
  • NumNodesOfType_Active_INPUT=216
  • NumNodesOfType_Active_IOBOUTPUT=2
  • NumNodesOfType_Active_OMUX=75
  • NumNodesOfType_Active_OUTPUT=59
  • NumNodesOfType_Active_PREBXBY=35
  • NumNodesOfType_Active_VFULLHEX=3
  • NumNodesOfType_Active_VLONG=1
  • NumNodesOfType_Active_VUNIHEX=11
  • NumNodesOfType_Vcc_BRAMDUMMY=16
  • NumNodesOfType_Vcc_INPUT=21
  • NumNodesOfType_Vcc_PREBXBY=5
  • NumNodesOfType_Vcc_VCCOUT=11
 SiteStatistics
  • IBUF-DIFFM=1
  • IBUF-DIFFS=1
  • IOB-DIFFM=1
  • SLICEL-SLICEM=12
 		SiteSummary
  • IBUF=2
  • IBUF_INBUF=2
  • IBUF_PAD=2
  • IOB=1
  • IOB_OUTBUF=1
  • IOB_PAD=1
  • MULT18X18SIO=2
  • MULT18X18SIO_MULT18X18SIO=2
  • SLICEL=35
  • SLICEL_C1VDD=3
  • SLICEL_C2VDD=10
  • SLICEL_CYMUXF=24
  • SLICEL_CYMUXG=20
  • SLICEL_F=34
  • SLICEL_F5MUX=1
  • SLICEL_G=30
  • SLICEL_GNDF=13
  • SLICEL_GNDG=2
  • SLICEL_XORF=8
  • SLICEL_XORG=8
 
Configuration Data
IBUF_PAD
  • IOATTRBOX=[LVCMOS33:2]
  • PULL=[PULLUP:2]
 IOB
  • O1=[O1_INV:0] [O1:1]
 IOB_OUTBUF
  • IN=[IN_INV:0] [IN:1]
 IOB_PAD
  • DRIVEATTRBOX=[12:1]
  • IOATTRBOX=[LVCMOS33:1]
  • SLEW=[SLOW:1]
 MULT18X18SIO
  • CEA=[CEA_INV:0] [CEA:2]
  • CEB=[CEB_INV:0] [CEB:2]
  • CEP=[CEP:2] [CEP_INV:0]
  • CLK=[CLK:2] [CLK_INV:0]
  • RSTA=[RSTA:2] [RSTA_INV:0]
  • RSTB=[RSTB:2] [RSTB_INV:0]
  • RSTP=[RSTP_INV:0] [RSTP:2]
 MULT18X18SIO_MULT18X18SIO
  • AREG=[0:2]
  • BREG=[0:2]
  • B_INPUT=[DIRECT:2]
  • CEA=[CEA_INV:0] [CEA:2]
  • CEB=[CEB_INV:0] [CEB:2]
  • CEP=[CEP:2] [CEP_INV:0]
  • CLK=[CLK:2] [CLK_INV:0]
  • PREG=[0:2]
  • PREG_CLKINVERSION=[0:2]
  • RSTA=[RSTA:2] [RSTA_INV:0]
  • RSTB=[RSTB:2] [RSTB_INV:0]
  • RSTP=[RSTP_INV:0] [RSTP:2]
 SLICEL
  • BX=[BX_INV:0] [BX:7]
  • CIN=[CIN_INV:0] [CIN:18]
 SLICEL_CYMUXF
  • 0=[0:24] [0_INV:0]
  • 1=[1_INV:0] [1:24]
 SLICEL_CYMUXG
  • 0=[0:20] [0_INV:0]
 SLICEL_F5MUX
  • S0=[S0:1] [S0_INV:0]
 SLICEL_XORF
  • 1=[1_INV:0] [1:8]
 
Pin Data
IBUF
  • I=2
  • PAD=2
 IBUF_INBUF
  • IN=2
  • OUT=2
 IBUF_PAD
  • PAD=2
 IOB
  • O1=1
  • PAD=1
 IOB_OUTBUF
  • IN=1
  • OUT=1
 IOB_PAD
  • PAD=1
 MULT18X18SIO
  • A0=2
  • A1=2
  • A10=2
  • A11=2
  • A12=2
  • A13=2
  • A14=2
  • A15=2
  • A16=2
  • A17=2
  • A2=2
  • A3=2
  • A4=2
  • A5=2
  • A6=2
  • A7=2
  • A8=2
  • A9=2
  • B0=2
  • B1=2
  • B10=2
  • B11=2
  • B12=2
  • B13=2
  • B14=2
  • B15=2
  • B16=2
  • B17=2
  • B2=2
  • B3=2
  • B4=2
  • B5=2
  • B6=2
  • B7=2
  • B8=2
  • B9=2
  • CEA=2
  • CEB=2
  • CEP=2
  • CLK=2
  • P0=2
  • P1=2
  • P10=2
  • P11=2
  • P12=2
  • P13=2
  • P14=2
  • P15=2
  • P2=2
  • P3=2
  • P4=2
  • P5=2
  • P6=2
  • P7=2
  • P8=2
  • P9=2
  • RSTA=2
  • RSTB=2
  • RSTP=2
 MULT18X18SIO_MULT18X18SIO
  • A0=2
  • A1=2
  • A10=2
  • A11=2
  • A12=2
  • A13=2
  • A14=2
  • A15=2
  • A16=2
  • A17=2
  • A2=2
  • A3=2
  • A4=2
  • A5=2
  • A6=2
  • A7=2
  • A8=2
  • A9=2
  • B0=2
  • B1=2
  • B10=2
  • B11=2
  • B12=2
  • B13=2
  • B14=2
  • B15=2
  • B16=2
  • B17=2
  • B2=2
  • B3=2
  • B4=2
  • B5=2
  • B6=2
  • B7=2
  • B8=2
  • B9=2
  • CEA=2
  • CEB=2
  • CEP=2
  • CLK=2
  • P0=2
  • P1=2
  • P10=2
  • P11=2
  • P12=2
  • P13=2
  • P14=2
  • P15=2
  • P2=2
  • P3=2
  • P4=2
  • P5=2
  • P6=2
  • P7=2
  • P8=2
  • P9=2
  • RSTA=2
  • RSTB=2
  • RSTP=2
 SLICEL
  • BX=7
  • CIN=18
  • COUT=20
  • F1=34
  • F2=26
  • F3=12
  • F4=7
  • G1=29
  • G2=22
  • G3=10
  • G4=10
  • X=18
  • XB=3
  • Y=16
 SLICEL_C1VDD
  • 1=3
 SLICEL_C2VDD
  • 1=10
 SLICEL_CYMUXF
  • 0=24
  • 1=24
  • OUT=24
  • S0=24
 SLICEL_CYMUXG
  • 0=20
  • 1=20
  • OUT=20
  • S0=20
 SLICEL_F
  • A1=34
  • A2=26
  • A3=12
  • A4=7
  • D=34
 SLICEL_F5MUX
  • F=1
  • G=1
  • OUT=1
  • S0=1
 SLICEL_G
  • A1=29
  • A2=22
  • A3=10
  • A4=10
  • D=30
 SLICEL_GNDF
  • 0=13
 SLICEL_GNDG
  • 0=2
 SLICEL_VDDG
  • 1=1
 SLICEL_XORF
  • 0=8
  • 1=8
  • O=8
 SLICEL_XORG
  • 0=8
  • 1=8
  • O=8
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s250e-tq144-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s250e-tq144-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s250e-tq144-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s250e-tq144-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s250e-tq144-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s250e-tq144-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s250e-tq144-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s250e-tq144-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s250e-tq144-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s250e-tq144-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s250e-tq144-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s250e-tq144-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s250e-tq144-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s250e-tq144-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
_impact 1 1 0 0 0 0 0
bitgen 121 121 0 0 0 0 0
map 129 128 0 0 0 0 0
ngc2edif 1 1 0 0 0 0 0
ngdbuild 129 129 0 0 0 0 0
par 128 128 0 0 0 0 0
trce 128 128 0 0 0 0 0
xst 311 311 0 0 0 0 0
 
Project Statistics
PROPEXT_xilxSynthMaxFanout_virtex2=100000 PROP_Enable_Message_Filtering=false
PROP_FitterReportFormat=HTML PROP_LastAppliedGoal=Balanced
PROP_LastAppliedStrategy=Xilinx Default (unlocked) PROP_ManualCompileOrderImp=false
PROP_PropSpecInProjFile=Store all values PROP_Simulator=ISim (VHDL/Verilog)
PROP_SynthTopFile=changed PROP_Top_Level_Module_Type=HDL
PROP_UseSmartGuide=false PROP_UserConstraintEditorPreference=Text Editor
PROP_intProjectCreationTimestamp=2019-05-16T10:34:31 PROP_intWbtProjectID=4049337FE061E67E2E21DAE1E3B47095
PROP_intWbtProjectIteration=7 PROP_intWorkingDirLocWRTProjDir=Same
PROP_intWorkingDirUsed=No PROP_lockPinsUcfFile=changed
PROP_xilxBitgStart_IntDone=true PROP_AutoTop=true
PROP_DevFamily=Spartan3E PROP_DevDevice=xc3s250e
PROP_DevFamilyPMName=spartan3e PROP_DevPackage=tq144
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_DevSpeed=-4
PROP_PreferredLanguage=VHDL FILE_UCF=1
FILE_VHDL=3
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=2 NGDBUILD_NUM_INV=7 NGDBUILD_NUM_LUT1=8
NGDBUILD_NUM_LUT2=26 NGDBUILD_NUM_LUT3=5 NGDBUILD_NUM_LUT4=17 NGDBUILD_NUM_MULT18X18SIO=2
NGDBUILD_NUM_MUXCY=44 NGDBUILD_NUM_MUXF5=1 NGDBUILD_NUM_OBUF=1 NGDBUILD_NUM_VCC=1
NGDBUILD_NUM_XORCY=16
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_GND=1 NGDBUILD_NUM_IBUF=2 NGDBUILD_NUM_INV=7 NGDBUILD_NUM_LUT1=8
NGDBUILD_NUM_LUT2=26 NGDBUILD_NUM_LUT3=5 NGDBUILD_NUM_LUT4=17 NGDBUILD_NUM_MULT18X18SIO=2
NGDBUILD_NUM_MUXCY=44 NGDBUILD_NUM_MUXF5=1 NGDBUILD_NUM_OBUF=1 NGDBUILD_NUM_PULLUP=2
NGDBUILD_NUM_VCC=1 NGDBUILD_NUM_XORCY=16
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ifmt=mixed -ofn=<design_top> -ofmt=NGC
-p=xc3s250e-4-tq144 -top=<design_top> -opt_mode=Speed -opt_level=1
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -write_timing_constraints=NO -cross_clock_analysis=NO
-bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100 -verilog2001=YES
-fsm_extract=YES -fsm_encoding=Auto -safe_implementation=No -fsm_style=LUT
-ram_extract=Yes -ram_style=Auto -rom_extract=Yes -shreg_extract=YES
-rom_style=Auto -auto_bram_packing=NO -resource_sharing=YES -async_to_sync=NO
-mult_style=Auto -iobuf=YES -max_fanout=100000 -bufg=24
-register_duplication=YES -register_balancing=No -optimize_primitives=NO -use_clock_enable=Yes
-use_sync_set=Yes -use_sync_reset=Yes -iob=Auto -equivalent_register_removal=YES
-slice_utilization_ratio_maxmargin=5