| DFLIPFLOP Project Status | |||
| Project File: | dflipflop.ise | Current State: | Programming File Generated |
| Module Name: | dflipflop |
|
No Errors |
| Target Device: | xc3s250e-4tq144 |
|
4 Warnings |
| Product Version: | ISE 9.1i |
|
Do Okt 8 17:56:05 2015 |
| DFLIPFLOP Partition Summary | |||
| No partition information was found. |
| Device Utilization Summary | ||||
| Logic Utilization | Used | Available | Utilization | Note(s) |
| Logic Distribution | ||||
| Number of Slices containing only related logic | 0 | 0 | 0% | |
| Number of Slices containing unrelated logic | 0 | 0 | 0% | |
| Number of bonded IOBs | 4 | 108 | 3% | |
| IOB Flip Flops | 1 | |||
| Number of GCLKs | 1 | 24 | 4% | |
| Total equivalent gate count for design | 11 | |||
| Additional JTAG gate count for IOBs | 192 | |||
| Performance Summary | |||
| Final Timing Score: | 0 | Pinout Data: | Pinout Report |
| Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report |
| Timing Constraints: | All Constraints Met | ||
| Detailed Reports | |||||
| Report Name | Status | Generated | Errors | Warnings | Infos |
| Synthesis Report | Current | Do Okt 8 17:37:12 2015 | 0 | 0 | 0 |
| Translation Report | Current | Do Okt 8 17:55:33 2015 | 0 | 0 | 0 |
| Map Report | Current | Do Okt 8 17:55:36 2015 | 0 | 4 Warnings | 3 Infos |
| Place and Route Report | Current | Do Okt 8 17:55:40 2015 | 0 | 0 | 1 Info |
| Static Timing Report | Current | Do Okt 8 17:55:44 2015 | 0 | 0 | 3 Infos |
| Bitgen Report | Current | Do Okt 8 17:56:05 2015 | 0 | 0 | 0 |