MUSTERVERGLEICH3 Project Status
Project File:	mustervergleich3.ise	Current State:	Programming File Generated
Module Name:	mustervergleich3	Errors:	No Errors
Target Device:	xc3s250e-4tq144	Warnings:	No Warnings
Product Version:	ISE 9.1i	Updated:	Do Sep 17 17:53:10 2015

 

MUSTERVERGLEICH3 Partition Summary

No partition information was found.

 

Device Utilization Summary
Logic Utilization	Used	Available	Utilization	Note(s)
Number of Slice Flip Flops	26	4,896	1%
Number of 4 input LUTs	17	4,896	1%
Logic Distribution
Number of occupied Slices	20	2,448	1%
Number of Slices containing only related logic	20	20	100%
Number of Slices containing unrelated logic	0	20	0%
Total Number of 4 input LUTs	40	4,896	1%
Number used as logic	17
Number used as a route-thru	23
Number of bonded IOBs	6	108	5%
Number of GCLKs	1	24	4%
Total equivalent gate count for design	475
Additional JTAG gate count for IOBs	288

 

Performance Summary
Final Timing Score:	0	Pinout Data:	Pinout Report
Routing Results:	All Signals Completely Routed	Clock Data:	Clock Report
Timing Constraints:	All Constraints Met

 

Detailed Reports
Report Name	Status	Generated	Errors	Warnings	Infos
Synthesis Report	Current	Do Sep 17 17:52:48 2015	0	0	0
Translation Report	Current	Do Sep 17 17:52:56 2015	0	0	0
Map Report	Current	Do Sep 17 17:52:59 2015	0	0	3 Infos
Place and Route Report	Current	Do Sep 17 17:53:03 2015	0	0	2 Infos
Static Timing Report	Current	Do Sep 17 17:53:05 2015	0	0	3 Infos
Bitgen Report	Current	Do Sep 17 17:53:10 2015	0	0	0