MUSTERVERGLEICH2 Project Status
Project File: mustervergleich2.ise Current State: Programming File Generated
Module Name: mustervergleich2
  • Errors:
No Errors
Target Device: xc3s250e-4tq144
  • Warnings:
No Warnings
Product Version: ISE 9.1i
  • Updated:
Do Sep 17 15:49:01 2015
 
MUSTERVERGLEICH2 Partition Summary
No partition information was found.
 
Device Utilization Summary
Logic UtilizationUsedAvailableUtilizationNote(s)
Number of Slice Flip Flops 26 4,896 1%  
Number of 4 input LUTs 17 4,896 1%  
Logic Distribution     
Number of occupied Slices 20 2,448 1%  
    Number of Slices containing only related logic 20 20 100%  
    Number of Slices containing unrelated logic 0 20 0%  
Total Number of 4 input LUTs 40 4,896 1%  
Number used as logic 17      
Number used as a route-thru 23      
Number of bonded IOBs 6 108 5%  
Number of GCLKs 1 24 4%  
Total equivalent gate count for design 475      
Additional JTAG gate count for IOBs 288      
 
Performance Summary
Final Timing Score: 0 Pinout Data: Pinout Report
Routing Results: All Signals Completely Routed Clock Data: Clock Report
Timing Constraints: All Constraints Met    
 
Detailed Reports
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentDo Sep 17 15:48:19 2015000
Translation ReportCurrentDo Sep 17 15:48:24 2015000
Map ReportCurrentDo Sep 17 15:48:27 2015003 Infos
Place and Route ReportCurrentDo Sep 17 15:48:32 2015002 Infos
Static Timing ReportCurrentDo Sep 17 15:48:34 2015003 Infos
Bitgen ReportCurrentDo Sep 17 15:49:01 2015000