| Transfert Project Status (05/05/2025 - 17:30:50) | |||
| Project File: | Transfert.xise | Parser Errors: | No Errors |
| Module Name: | seriellemu | Implementation State: | Programming File Not Generated |
| Target Device: | xc3s250e-4tq144 |
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| Product Version: | ISE 14.7 |
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| Design Goal: | Balanced |
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| Design Strategy: | Xilinx Default (unlocked) |
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| Environment: | System Settings |
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| Detailed Reports | [-] | |||||
| Report Name | Status | Generated | Errors | Warnings | Infos | |
| Synthesis Report | Current | Mo. Mai 5 16:01:00 2025 | ||||
| Translation Report | ||||||
| Map Report | ||||||
| Place and Route Report | ||||||
| CPLD Fitter Report (Text) | ||||||
| Power Report | ||||||
| Post-PAR Static Timing Report | ||||||
| Bitgen Report | ||||||
| Secondary Reports | [-] | ||
| Report Name | Status | Generated | |
| WebTalk Report | Current | Mo. Mai 5 17:30:49 2025 | |
| WebTalk Log File | Current | Mo. Mai 5 17:30:50 2025 | |